In recent years, in order to achieve a higher function of MOSLSIs, a method has been developed in which presently available functional devices are formed on one chip. In order to achieve a higher function of a one-chip microcomputer (hereinafter referred to as microcomputer), a nonvolatile memory device such as EPROM (ultraviolet-erasable programmable ROM) is formed on one chip together with the microcomputer.
The EPROM is formed of an n-channel MOS transistor provided on a p-type silicon substrate. On the other hand, the microcomputer is comprised of a complementary MOS (hereinafter referred to as CMOS) provided on an n-type silicon substrate. Hence it is necessary to appropriately change microcomputer circuits and manufacturing processes so that the EPROM can be mounted on the microcomputer.
FIG. 1 cross-sectionally illustrates a device in which an EPROM comprised of a CMOS and a microcomputer comprised of a CMOS, provided on a p-type silicon substrate, are formed on one chip.
A p-type impurity layer 2 and n-type impurity layers 3 and 4 provided adjacently to the p-type impurity layer 2 are formed on a p-type silicon substrate 1. An n-channel transistor 5 that constitutes a CMOS circuit is formed on the p-type impurity layer 2. P-channel transistors 6 and 7 are formed on the n-type impurity layers 3 and 4, respectively. An EPROM 8 is directly formed on the p-type silicon substrate so that a high-speed performance can be improved.
Two kinds of voltages are applied to the EPROM, which are an electric source voltage (5 V) and a writing voltage (12.5 V). A drive circuit that applies a voltage of 5 V to the EPROM is formed in the p-channel transistor 6, and a drive circuit that applies a voltage of 12.5 V to the EPROM is formed in the p-channel transistor 7.
Here, the p-type impurity layer 2 is formed between the n-type impurity layers 3 and 4. Hence the n-type impurity layers 3 and 4 having different voltage values are electrically separated from each other. The p-type silicon substrate 1, the p-type impurity layer 2 and the source of the n-channel transistor 5 electrically coommunicate and hence each have ground potential. In this way, the source of the n-channel transistor 5 and the p-type impurity layer 2 are all made to have ground potential when a microcomputer on which an EPROM is mounted is formed on the p-type silicon substrate 1.
As described above, in microcomputers having no special functional circuit in the body of a microcomputer, the EPROM can be mounted without difficulty by making an alteration in the silicon substrate.
To more detail the construction of the device shown in FIG. 1, FIG. 2 illustrates a perspective view of the device.
In FIG. 2, the p-type impurity layer 2 fitted thereon with the n-channel transistor 5 is formed within the region surrounded by a p-type impurity layer 20. The n-type impurity layers 3 and 4 fitted thereon with the p-channel transistors 6 and 7, respectively, are also formed, and the EPROM 8 is formed on the surface of the p-type silicon substrate 1. Here, the p-type impurity layer 2 that electrically separates the n-type impurity layers 3 and 4 is present between the p-channel transistor 6 that supplies the voltage of 5 V for driving the EPROM 8 and the p-channel transistor 7 that supplies the voltage of 12.5 V for writing.
In such a conventional device, the potential of the p-type impurity layer 2 must be independently controlled in the CMOS circuit. No analog circuit can be driven unless the potential of the p-type impurity layer 2 can be independently controlled. Hence, in order to use the p-type impurity layer 2 in an independently controlled state, the CMOS circuit must be formed on an n-type silicon substrate 1. This means that the p-channel transistors 6 and 7 formed on the n-type impurity layers 3 and 4, respectively, come to have potential common to that of the silicon substrate in the case when the CMOS is formed on the n-type silicon substrate 1. On the other hand, in respect of the n-channel transistor 5 formed on the p-type impurity layer 2, the voltage can be independently applied regardless of the n-type silicon substrate 1.
However, in the case when an MOS analog circuit is formed on the body of a microcomputer, an alteration of the silicon substrate makes it necessary to design the analog circuit once more, bringing about a lowering of function on account of the alteration of a circuit design.
FIG. 3 cross-sectionally illustrates a device in which an operational amplifier that constitutes an A/D (analog-to-digital) converter of an MOS analog circuit is mounted on the body of a microcomputer.
P-type impurity layers 11 and 12 are formed on an n-type silicon substrate 10. An n-type impurity layer 13 is also formed adjoiningly to the p-type impurity layers 11 and 12. An n-channel transistor 14 for the part of an operational amplifier is formed on the p-type impurity layer 11. Other n-channel transistor 15 and p-channel transistor 16 are formed on the p-type impurity layer 12 and the n-type impurity layer 13, respectively.
At the n-channel transistor 14, an n-type high-density impurity layer 17 serving as a source is in contact with a p-type high-density impurity layer 18. Hence the source potential at the source of the n-channel transistor 14 is designed to be in agreement with the potential of the p-type impurity layer 11. Thus, the device can operate in the manner that the back bias effect can be prevented even when the potential at the source is varied.
If a p-type silicon substrate is used to form a microcomputer having such a functional circuit, on one chip together with an EPROM, the p-type impurity layers are all fixed to the ground potential of the silicon substrate since the n-channel transistor has a source that can have the same potential as that of the p-type silicon substrate. As a result, the n-channel transistor does not operate. The MOS analog circuit, designed making the most of the characteristic features of the p-type impurity layer formed on the n-type silicon substrate, does not function at all when the p-type silicon substrate is used.
In order to solve such problems, in usual instances the source of the n-channel transistor and the p-type silicon substrate are electrically disconnected and the circuit is operated in the state the back bias effect has been brought about. In the state the back bias effect has been brought about, however, the analog circuit may undergo serious deterioration of its characteristics.
In order that a circuit comprising a microcomputer and, formed on the body thereof, a functional device such as an MOS analog circuit can be formed on one chip together with a nonvolatile memory device, an n-type high-density impurity layer and a p-type high-density impurity layer are formed in contact with the source of an n-channel transistor of the analog circuit using an n-type silicon substrate, where the source voltage is made to be in agreement with the potential of the p-type impurity layer so that the back bias effect may not be caused.
When, however, an EPROM is formed on the n-type silicon substrate, the EPROM is formed on the p-type impurity layer. In order to drive the EPROM, the p-channel transistor supplies 5 V of drive voltage and 12.5 V of writing voltage. Here, the substrate current generated at the time of writing is accumulated in the p-type impurity layer to cause defective writing. Thus, the EPROM can operate without difficulty when a p-type silicon substrate is used in such a way that the substrate current may not be accumulated in the p-type impurity layer.
On the other hand, the analog circuit does not operate at all since the p-type impurity layer and the source are made to have the same potential. For this reason, when the source and the p-type silicon substrate are used in an electrically separated state, there is a problem that the back bias effect is caused to bring about a deterioration of the characteristics of the analog circuit.
An object of the present invention is to provide a semiconductor device comprising a nonvolatile memory device and a functional device, formed on the same chip, that may cause no defective writing of the EPROM and also may cause no deterioration of the analog circuit, and a process for manufacturing such a device.